Digital servomechanism alignment system



June l1, 1968 c. E.| ENZ 351588,304

DIGITAL SERVOMECHANISM ALIGNMENT SYSTEM ATTORNEY C. E. LENZ DIGITAL SERVOMECHANISM ALIGNMENT SYSTEM June l1, 1968 9 Sheets-Sheet 2 Filed Oct. 2, 1964 INVENTOR. CHARLES E. LENZ June l1, 1968 c. E. LENZ DIGITAL SERYOMECHANISM ALIGNMENT SYSTEM 9 Sheets-Sheet 5 Filed Oct. 2, 1964 CHARLES E. Lenz ATTORNEY June 11, 1968 c. E. LENz 3,388,384

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CHARLES E. LENZ BY 7M.

ATTORNEY 9 Sheets-Sheet 5 June 1l, 1968 C. E. LENZ DIGITAL SERVOMECHANISM ALIGNMENT SYSTEM Filed Oct. 2, 1964 waisxs loamoo slvNsls .Las-asma 'N LNawaaoNl oNvwwoo aNv a'levNa-amao lasuouua 'IVNSIS NOLLOW June 11, 1968 C, E, LENZ DIGTAL SERVOMECHANISM ALIGNMENT SYSTEM 9 Sheets-Sheet 6 Filed Oct. 2, 1964 b .if Vfl mink! CLOCK SIGNAL ALIGNMENT COMMAND FROM COMPUTER INITIALIZER FLIP FLOP STATES REFERENCE CARRIER ANGLE O SIGNAL Isf SYSTEM SET SIGNALS CCW MOTION COMMAND FROM TRANSDUCER CCW INCREMENT COMMAND TO CONTRO. SYSTEM FIG.

INVENTOR.

CHARLES E. LENZ BY M 7 ATTORNEY j June 11, 1968 c.E.1 ENz DIGITAL SERVOMECHANISM ALIGNMENT SYSTEM Filed Oct. 2, i964 9 Sheets-Sheet '7 L .229m wm" m 5.52 mmpo" Ew 5.520 mozwmwmuLm INVENTOR. CHARLES E. LENZ Www/7%,

June 11, 1968 c. E. LENZ DIGITAL SERVOMECHANISM ALIGNMENT SYSTEM Filed oct.

| l l l l l I June 11, 1968 c. E. LENZ 3,388,304

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Yb ml r Tu I E I TRlsGER s I `S 6'2 l T T 'if Vt 0 VR C *B-#X l l ouTPuT l n SIGNAL To l THE REVER- l slBLE STEP l T|2 couNTER 2o E5*TR|GGER FIG. 9

INVENTOR CHARLES E. LENZ ATToRN United States Patent O 3,388,3li4 DIGITAL SERVMECHANISM ALIGNMENT SYSTEM Charles E. Lenz, Fullerton, Calif., assignor to North American Rockweli. Corporation, a corporation of Delaware Filed Oct. 2, 1964, Ser. No. 401,176 9 Claims. (Cl. S18-18) ABSTRACT F THE DISCLOSURE A digital alignment system which operates with an incremental digital position control system of the phase comparison type. The alignment system functions by moving an output shaft towards a reference position until it is within a predetermined number of radians of that position. The control system input command is then changed to a Ipredetermined iixed value. The output shaft is subsequently released to the control of the incremental digital servomechanism allowing the output shaft to be driven to the alignment position with the full accuracy of the digital control system and without error due to the alignment system.

This invention relates to an alignment system and more particularly to a digital servomechanism alignment system for significantly increasing the effective accuracy of an incremental digital positioning-type servomechanism by completely eliminating the alignment system error component from the total error of the system.

The alignment system is specifically designed for use with an incremental phase-comparison angular-positioncontrol system such as the type shown, disclosed and claimed in applicants co-pending application Ser. No. 395,530 tiled Sept. 10, 1964, entitled, Digital Position Control System, assigned to North American Aviation, Inc., the assignee of this invention. The alignment system may also be used with equivalent types of angular or linear-position-control systems.

The above referenced system utilizes a single output transducer which yields a phase-modulated carrier with the phase varying n times the amount by Which the output shaft angle varies, where n is an integer greater than 1.

An alignment system is essential with an angular or linear-position-control system using a transducer of the type described which provides an ambiguous output, since otherwise the output shaft would go to whichever of the n stable nulls was nearest to the shaft position at the time of power application.

The alignment system is used to accurately establish the reference position from which an incremental digital 3,388,304 Patented June 11, 1968 ICC chanical means. Such electrical adjustment can be made in smaller increments than would be practical mechanically.

positioning servomechanism must measure relative position to determine absolute position.

The present invention eliminates the mechanical means, such as a stop, which are normally employed to establish the point from which all positions are measured by an incremental position-control system. In typical cases involving control systems of extreme accuracy, accuracy is improved by an order of magnitude or better due to elimination of such difficulties as mechanical wear and deformation.

In the present invention, the actual location of the starting or reference position is established by the main phase-comparison control loop, rather than by the alignment system. Thus, the precautions and relative expense of achieving extreme accuracy are conlined to the main phase-comparison control loop, where they are otherwise necessary, and the transducer alignment channel can be relatively inaccurate and easily adjustable.

Also, final factory adjustment of the starting or reference position can be made by electrical, rather than me- This type of alignment system will operate with a variety of incremental digital position-control systems of the phase-comparison type in which both the incremental digital input command and the output shaft angle 00 are converted to phase shifts of a reference carrier. In a normal single-speed phase-comparison servomechanism in which the output carrier-phase shift is O=n0m Where n is a positive integer, n separate null positions will exist for the output shaft for any -given input command. The alignment system upon receiving an alignment-command pulse functions by moving the output shaft toward the reference position until it is within i1r/ n radians of that position, then changes the control-system input command to zero (or other predetermined value), and finally releases the output shaft to the control of the phase-comparison servomechanism, The output shaft will then be driven to the reference position with the full accuracy of the servomechanism without error due to the alignment system. Since an incremental digital positioning type -control system positions by moving a known number of lixed increments from a known starting or reference position, the total position error includes the error of the starting position plus the error in the distance moved; the former error has now been greatly reduced.

In general, initial construction, factory adjustment, and later maintenance of the alignment system are simpler and more economical than otherwise possible because of the alignment concepts employed herein. These benefits result from elimination of mechanical stops, the possibility of electrically adjusting the alignment position in smaller increments than practical by mechanical means, and the relatively wide tolerances permissible in the alignment channel, typically exceeding by over an order of magnitude the tolerances permissible in the main phasecomparison control loop. Since alignment is automatic after the alignment system receives an alignment-command pulse, no elaborate programming of an associated digital computer is needed. Maximum use is made of digital techniques which rely only on the presence or absence of a signal, rather than on signal amplitude.

It, therefore, is an object of this invention to provide an automatic alignment system for use with an incremental digital servo.

It is, therefore, another object of this invention to provide an alignment system for completely eliminating the alignment system error component from the total error of an incremental digital positioning-type servomechanism.

It is a further object of this invention to provide an alignment system which requires no elaborate programming of an associated digital computer.

`It is still another object of this invention to provide an alignment system which eliminates the use of mechanical stops.

It is yet another object of this invention to provide in an alignment system a means for electrically adjusting the alignment reference position in smaller increments than practical by mechanical means.

These and other objects of the present invention will become apparent from the following description read in connection with the accompanying drawings in which:

FIG. la is a block diagram of the alignment system;

FIG. 1b is a partial block diagram of a phase-comparison angular-position-control system;

fFIG. 1c is a partial block diagram of a phase-comparison angular-posi-tion-control system;

lFIG. -2 is a logic diagram of the transducer alignment' channel;

FIG. 3 illustrates the various waveforms relating to the transducer alignment channel;

FIG. 4 is a logic diagram of the alignment system initializer section;

IFIG. 5 illustrates the various waveforms relating to the alignment system;

`FIG. 6 is a logic diagram of the reference-angle gate and the associated two-phase reference-carrier generator;

FG. 7 is a logic diagram of the reversible step counter and the associated overload detector;

FIG. 8 is a logic diagram of the variable-phase generator;

FIG. 9 is a logic diagram of the digital step detect-or.

THE SYSTEM AND BASIC COMPONENTS In FIG. 1a are the basic components of the alignment system, the initializer .1 and the transducer a-lignment channel 2. The initializer 1 is a combination of logic elements which, upon receiving an alignment-command pulse Wa from an associated digital computer or other source, generates to the associated incremental phasecomparison control system the sequence of logic signals necessary to cause the control system to move the output shaft 23 to the reference position from which all subsequent motion will be measured. Slew-pulse train Yj is also required by the initializer; during alignment, this pulse train is applied. to the proper incremental-command input of the control system to cause movement toward the reference position at a predetermined rate.

The transducer alignment channel 2 has as its input the control-system shaft angle 00. The outputs of the transducer alignment channel are the logic signals Yd and Ye, only one of which can be true at any given time. When true, Yd or Ye indicates the preferred direction of rotation of the output shaft 23 to the reference position to be counterclockwise or clockwise, respectively. Within a small angle or sector which includes the reference position, Yd=Ye=0. Signals Yd and Ye are applied to the initializer f1. .The sector within which Yd=Ye=0 must extend less than 1r/n radians in either direction from the reference position, where fz is the ratio of carrier phase shift produced by the output-shaft-angle phase encoder 22 to the corresponding angular position 6o of the output shaft 23.

'A sine wave is defined herein as being in phase with a logical square wave of the same frequency when each positive (negative) slope zero crossing of the former occurs at the same instant as each false-true (true-false) jump of the latter. Thus the normal output of a binary counter is in phase with a sine Wave only if the initial count at time t=0+ is 10 0.

In this discussion, upper case symbols are used to denote logical variables, discrete-valued voltages, and constant source voltages. All lother voltages will be denoted by lower-case symbols.

The incremental phase-comparison angular-positioncontrol system illustrated in FGS. 1b and i1c is similar to applicants Digital Position Control System referenced previously. Modifications made to that system to adapt it to the present invention will be described in this description in logical order.

The digital phase-modulating generator 3 generates a phase-modulated square-wave out-put Ei.

The phase of E, is advanced or retarded by an increment 2ir/m1 electrical radians in response to each input pulse from a computer (not shown) applied to the counterclockwise or clockwise input terminals M+, and A01, respectively, where m1 is a positive integer dependent uponthe digital phase-modulating generator design.

The OR-gates 12 and 1-3 act as summing points to allo-w the signals Yf and Yg to be inserted into the phase modulating generator while affording a degree of separation between the sources of these input signals and the signals present on the input terminals. Standard OR-gates well known to those persons skilled in the art may be used for components 12 and 13.

The output-shaft-angle phase encoder 22 shifts the phase of Eo by an angle 110:1100, where 00 is the output shaft angle. The output E0 of the phase encoder is the feedback signal for the phase-comparison servomechanism loop.

The output-shaft-angle phase encoder 22 consists of a two-phase reference-carrier generator 17 which supplies two square waves, Er and Erq, equal and fixed in frequency but separated in phase by degrees. The frequency of the signal Ei at the output yof the phase-modulating generator is equal to that of the square wave E, when the angular output velocity, 60, of shaft 23 equals zero. The square wave E, is applied to the reference bandpass amplifier 18 which allows the sinusoidal component of the square wave to be passed and amplified and appear at amplifier |18s output as a signal e1=sin wrt. The square wave Erq applied to the quadarture bandpass amplifier .19 which allows the `sinusoidal component of the square wave to be passed and amplified and appear at amplifier 19s output as a signal e,.q=cos wrt. The carrier generator 1-7 also supplies the necessary signals to the reference-angle gate 14. The reference-angle gate 14 supplies to the initializer 1 the signal Y I r which is true only when the reference-carrier angle is between specified limits. The carrier generator can also supply the slewpulse-train signal Yj.

The Inductosyn 9 receives the shaft angle 60 and the outputs from amplifiers 18 and 19. It operates upon these inputs to supply a signal eA, which in turn is amplified by the linear output amplifier 21. The error sign-al E0 appears at the output of this amplifier.

The two-phase clock 2,4 provides the two pulse trains, C1 and C2, of constant and equal repetition rates. The pulse train C1 is normally employed for triggering fiipflops, while C2 is used both for interrogation to determine the states of flip-flops after settling and for over ride resetting of flip-flops. The reference-carrier generator 17 is synchronized by the clock signal C1.

The digital phase comparator 6 provides a discretevalued output voltage EE of average value E, proportional to the quantized phase difference between Ei and E0. These phase angles of El and En will be defined as pi and p0 respectively, and the phase difference between pi and bo will be defined as pf.

The phase comparator contains a digital step detector 10 for providing an up-count pulse at X1 to the reversible step counter 20 in response -to each positive step of input El and to provide a down-count pulse at X6 to that counter in response to each negative step of input En. The pulses provide are from the clock train C1. The pulse train C2 is used to override reset the flip-flops in the step detector. Also contained within the phase comparator is a reversible step counter 20 which increments one count for each false-true jump of E1, and which decrements one count for each true-false jump of Eo. The action of the counter is cyclic, and its count Ce is between 1 1 and 0 0 for 11 1r. The count Ce is converted instantaneously to the voltage Ee in the digital-to-analog converter 30 by weighting the most significant bit negatively, by weighting all other bits positively, and by adding a bias equal to one-half the bit voltage. The voltage EE is then averaged in the averaging element 40 and appears at its output as the voltage 5,. The phase comparator 6 also supplies signals to the overload detector 4 (refer to FIG. 7). Contained within the overload detector is an error overload ip-fiop F24 which is set if the magnitude of the phase angle pe rises sufiiciently to overload the reversible step counter 20 and thereby cause a permanent error. This fiip-flop can be reset only by the alignment system. The normal output of the fiip-iiop is W0, a signal which is direct both to the computer (not shown) and to the alignment system. The complement output is 'X7-V0, a signal which is directed to the loopinhibit'switch 5. The loopinhibit switch shorts the output E, to ground to disable the phase-comparison servomechanism loop. The servo loop is enabled only when w,=0.

The compensated driver 7 provides a continuously variable output voltage ed proportional in the steady state to the average value of Ec over a cycle of this voltage. In addition, this component provides the compensation necessary to yield required stability, transient response, and steady-state stiffness. The output voltage ed is furnished at a suitable power level to drive the torque motor 15.

The electromechanical system 8 includes the torque motor which is connected to the output shaft 23. The angular position of the output shaft is 00, a quantity which is directed to both the output-shaft-angle encoder 22 and the transducer alignment channel `2. The load inertia 16 which may be a telescope, rack, etc., is driven by the output shaft 23.

To permit explanation of the operation of the digital alignment system with an associated digital positioncontrol system, certain of the signiiicant variables involved will now he defined analytically. First, the incremental input-command signals A0+j(t) and Al-'10) will be derived from the continuous input variable 01(2). The electric-al angles by which information is transmitted in the phase-comparison type of digital position-control system being considered will then be discussed. For this purpose, both the total electrical and relative phase angles of a logical square wave will be defined as equal to the corresponding angles of the fundamental sinusoidal component of that square Wave. The first electrical angle to be considered will be the total angle r(t) of the reference carrier EAI); all phase angles are measured relative to this angle. Next, the total and relative-phase angles @1(1) and p10) of the input carrier E10) will be defined, along with the corresponding angles t (t) yand o(t) of the output carrier EDU). An error-phase angle 756(1) will also be deiined. Finally, an analytic expression for the average value of the phase-decoderoutput E60) over a cycle will'be developed.

In the following discussion an analytical expression for the incremental input signals A0+i(t) and Al-,(t) will be developed. Let the input command @1(1?) be an analytic function at every point on the time or t axis such that 7V 1 m1n=9(0) mm (l) where the positive integer n equals the electrical speed of the output transducer 22 and the even positive integer m1 equals the number of states of the variable-phase generator in the phase-modulating generator. (F. B. Hildebrand, Advanced Calculus. New York: Prentice-Hall, 1949, pp. 496-499. Here it is assumed that 91(1) is single-valued and has iinite derivatives of all orders for all real values of t.) The variable-phase generator is illustrated in FIG. 8 and is contained within the phase modulating generator 3 which is disclosed in detail in applicants co-pending application Ser. No. 368,090 tiled May 18, 1964, now U.S. Patent No. 3,316,503, entitled Digital Phase Modulated Generator. A function y(0,) will be dened as follows:

notent-@M0 (2) The corresponding jump function is (Murray F. Gardner and John L. Barnes, Transients in Linear Systems. New York: John Wiley & Sons, inc., 1952, pp. 287-288).

In accordance with the reference cited, a jump function assumes the largest integral value less than or equal to its argument, in this case 1/2(m1n1r101{l). The reference states that for a jump function the value at a discontinuity will be taken as the value of the function as the argument aproaches the point of discontinuity from the right. (Supra, p. 287.) Care is necessary when a jump function is evaluated at a discontinuity, however, if the argument is a dependent Variable, as is the case in Relation 3 if 01 is expressed as a function of the independent variable t. It the definition Z(i)=ly[0i(f)] (4) is made, it follows that if a discontinuity of z(t) occurs within a yanishingly small distance from t=ta, then z(a)=z(ta+) if 9102,) 0, and z(ta) =z(ta) if 9103,) 0. Here is a vanishingly small positive increment of time. The conditions 1(ta)=0 can lead either to 20a) :Zuni-5) O Z(fa.) :Z(ta"") or to z(ta+)?Z'(fa)=/Z(a-)s de pending upon the values of the second and higher-order derivatives of @1(1?) at tk.

The jump function z(l) will next be -resolved into two component jump functions, z+(t) and z-(t), which incnease and decrease monotonically with time, respectively, in such a manner that z+(f)lz(t)=z(f) (5) The initial-condition and backward-diterence relations and will be assumed for z+(t) and z(t), Where the backward difference The jump functions z+(t) and z(t) are uniquely defined by either of two icombinations of the preceding relations. Relations 6 through 9 form one such combination; Relations 7a through 1l form the other. Relations 1 through 3 are pertinent in either case.

A constraint must be placed upon the minimum time between conseeutive jumps of z(t) of the same polarity to permit accurate operation of the phase-modulating generator. Let the time at which the kth jump of z(t) for t 0 occurs be designated tk, where k is a positive integer. If, and only if, the jump of z(t) at tk+p is of the same polarity as that at tk,

where 0 p 2 is an integer. Whenever Relation 12 applies, for accurate operation of the cnotrol system it is necessary to satisfy a relation of the form A01*()=z(t-ri)-z(t) (l5) where the algebraic and logical values of Ai+(l) and A0,(t), respectively, and assumed equal. Each pulse of Ai+(t) or A01(t), respectively, is a command to the control system to increase or decrease the output shaft angle by 21rm1-1n-1 radian. The value of 0(0), quantized with a width of 2mm-MV1 radian, is given by and t 1r @,(t) mw L [e ,en A@ einem (16) for any value of t 0 for which the logical relation A01+(r)+Ao1-(t)=0 (17) applies.

A slightly different viewpoint is obtained by proceeding from Relation 3 and defining two functions as follows:

A t s t t y( y( wb2 (19) wherey,

zi, and zgru) :kl sin (PrO) (22) where I r(t)=wrt (23) Here wr=21r/m17 and t=elapsed time In these definitions, the positive linteger m1 equals the number of states of the variable-phase generator contained within the phase-modulated generator 3, and r is the clock period.

Similarly, an expression for the fundamental sinusoidal component of the input carrier Ei(t) may be written as ei(f)=k1 sin eo) (24) 8 All symbols used here were previously defined except i() i(t)=the relative phase angle of the input-command carrier The input phase angle 1(t) is related to the input command 0(t) in the following manner:

The error e(t) is due to the time delay of the phasemodulated generator in responding to the incremental input-command signals A01+(t) and Ai-(t). In general, 6,(1) is so bounded that Moreover, in the steady state with 0(t)=0, ei(t)=0. The fundamental sinusoidal component of the output carrier EGO) is eo(t)=k1 sin cI Q(t) (28) where q)00):f"rt"l"po(t) (29) Here O(l)=the relative phase angle of the output carrier The output phase angle 4 0(t) lis determined by the output shaft angie 60(1) according to the relation n=the speed of the output transducer An error phase angle may also be dened to which the phase comparator 6 is approximately responsive. This Variable is given by the relation 2 7 r mlfoq) Although o(t) is a continuous function of time, quantization indicated by the jump function in Relation 31 occurs in the phase comparator.

The purpose of the following analysis is to develop an expression for the average value ECU) over an output cycle of the discrete two-level phase comparator output EE0). The quantity (t) is to be expressed as a function of the phase angles @(t) and p00) of the two logical input signals E(t) and ECU).

Here all phase angles will be measured relative to a logical square-wave reference carrier EIO). The phase of a logical square wave will be defined as equal to the phase angle of its fundamental sinusoidal component. For E10), EQU), and E,(t) these components are, respectively,

ei()=k1 Sin [wrf+i()] (32) ecm-:k1 sin [wrt-l-QSOUN (33) er(t) :k1 sin wrt (34) This treatment will be limited to the case lato-Mol@ (35) Under this condition positive steps of Ei(t) and negative steps of E00) always alternate in time of occurrence. The phase comparator discussed produces the constantmagnitude output of varying sign where A is a positive constant. The quantities t+1; and fk are the times of the kth positive and negative steps of E(t) and EQU), respectively, where k is a positive integer. In accordance with Relations 36a and 36b, the kth positive and negative steps of Ee(t) also occur at approximately t+1; and t-k, respectively, if the slight delay of the phase comparator is neglected. Initial conditions are so established that In normal applications the trigonometric argument w,t-},(t) in Relation 32 is a monotonically increasing function of time so that 1(I)-wr (38) Only the case where this restriction and the restriction o(t)-wr (39) apply will be considered. The limit imposed upon the maximum absolute value of i(t) by the response of the phase-modulated generator is normally more severe than that imposed by Relation 38. From the preceding definition of phase comparator operation, it follows that Symbols for the duration of the positive part, the duration of the negative part, and the total duration of the kth cycle of the phase decoder output EE?) will now be defined, respectively, as

Using these definitions, it follows that the average value of the output signal EEO) over the kth cycle is 'rek +1r+1+k (45) It is now useful to define the transition times in the preceding relation in terms of their displacements from corresponding transition times of the reference carrier Er(t). The displacement of the kth positive step ofk Erft) will be defined as eek 27T Aqik 5 2) where iik=the average of the initial and final values of qbift) for the kth cycle of E,(t) and A pik=the net variation of 1510) during the kth cycle of EE0) Thus the l'average value of the phase comparator output E,(t) over the kth cycle is directly proportional tothe average of the initial and final values of the input phase 1(t) during the cycle .minus the value of the output phase p00) at fk during the cycle, where t-k is the time of the kth negati-ve step of the comparator output ECU). The average voltage 'rick is inversely proportional to 21r minus 10 the net variation of the input phase 1(t) during the cycle. Relation 52 has no singularity for finite values of p10). For the =usual small values of ],k[ and lAqkl, Relation 52 can be well approximated by a simpler expression.

Under these conditions,

-- gikWk) (53) and` Through'use of Relations 53 and 54, Relation 52 may be rewritten Interface signals Interface signals are defined as those signals which must pass in either direction between the alignment system and the associated control system to permit the functioning of each. These signals are shown in FIG. la. Of these signals, only the output response 000) is a continuously variable analog quantity. The remaining interface logic signals are described below:

1(1) Error-set signal Yb. This logic signal is directed from the initializer l to the digital phase comparator 6. The purpose of the signal is to set the reversible step counter 2G in the latter component to the proper state Cs.

(2) Drive-enable signal YC. This logic signal is directed from the initializer l to the overload detector 4. The purpose of the signal is to reset the error-overload iipfiop F24 in the latter component so that WO=O, thereby enabling the servo loop.

(3) Counterclockwise and clockwise incremental motion signals Yf and Yg. These logic signals are directed from the initializer 1 to the phase-modulating generator 3. The purpose of these signals is to command the control system to move the output shaft 23 toward the reference position during the alignment procedure. The control system responds to signals Yf `and Y,g from the alignment system in a manner corresponding to that in which it responds to inputs A014' and A0,- from the computer, respectively; the latter two inputs must be held false during alignment. During alignment, .a pulse train will normally appear at either Yf or Yg; each pulse will advance or retard the phase of E1 -by 21r/m1 electrical radius, respectively, where m1 is the integer discussed in the preceding description of the phase-modulating generator 3.

(4) Reference-ca-rrier-angle-O signal Ygr. This logic signal is directed from the reference angle gate `14 to the initializer 1. The purpose of the signal is to indicate the instantaneous electric angle of the square-Wave reference Er. The value of the logic signal is defined as follows.

where wr=frequency of the fundamental sinusoidal component of the reference carrier 'Efr in radians per second,

tztime in seconds,

p=time function of integral value chosen to meet the conditi-ons wrt wrt 2T Kp: 2T

and the other symbols are as previously delined.

(5) Command-phase-set signal Y1. This logic signal is directed from the initializer 1 to the phase-modulating generator 3. The purpose of the signal is to set the electrical angle 1(t) of the phase-modulating generator output E10) equal to the electrical angle QIC) of the refer ence-carrier generator output Er(t) (6) Error-overload signal Wo. This logic signal is directed from the overload detector 4 to the initializer 1, as well as to the computer. The signal is sent to the alignment system to indicate that a disturbance torque has caused the error-phase magnitude p,(t)| to rise to a value beyond the capacity of the phase comparator 6. If this condition arises while the control system is `being aligned, the initializer will terminate the alignment procedure and await another alignment command W1 from the computer ybefore proceeding.

OPERATION OF COMPONENTS General In the paragraphs which follow, operation of the alignment system will be described in general terms. A more detailed description will follow, when operation of the individual components is discussed.

The alignment procedure is initiated by an alignmentcommand pulse Wa transmitted to the alignment system from a digital computer or other external source, as shown in FIG. la. The alignment command is given either as the first command after power to the control system is applied or interrupted, or whenever an error-overload signal Wo is received by the computer.

After the alignment-command pulse WL is transmitted to the initializer from the computer, no further commands are sent to the control system by the computer until the -alignment procedure is completed. The operations of the alignment system during alignment are listed below in sequence:

Phase comparator 6 has been presumed capable of detecting phase errors outside the range iff radians. At the beginning of the alignment procedure, the phase comparator will produce an output voltage Ee corresponding to some phase error within its range. However, to limit initial transient disturbance of the control system, the absolute value I (t)[ of the phase error may be limited to 1r radians by these operations:

(1) Read the reference-carrier-angle-O signal YM to determine the instantaneous electrical angle of the reference carrier Er(t). The electrical angles I r(t) and I 1(t) of EIO) and E10), respectively, are quantized before reading with a quantum width of 21T/m1 radians. In general, YEN will remain true for one period of clock train C1 during each cycle of Er; this clock period will immediately follow the false-to-true jump of Er.

(2) Reset the error-overload Hip-flop F24 in the overload detector 4 while Ym.=l. This operation will cause the error-overload signal Wo to equal 0, thereby closing the servo loop. This is accomplished by sending `a Y :l pulse from the initializer to the overload detector.

(3) Set the reversible step counter 20 in the phase comparator to O while Y@ l.=-1. This operation is accomplished with a Yb=1 pulse. The phase-error amplitude |E| is thereby set to less than 1r electrical radians.

(4) Set the electrical `angle i(t) to 0 while Yr=l. This operation is accomplished with a Yi=1 pulse from the initializer to the counter in the phase modulating generator which is generating E) as its output. The operation puts E10) in phase with Er(t).

(5) Set the step detector in the phase comparator while Yb=1 by the means described in the following paragraph to inhibit a possible extraneous up-count pulse to the reversible step counter. Such an extraneous pulse would increase the phase-error amplitude [tbe] beyond 1r electrical radians. At this time an undesired up-count pulse Would cause an unnecessarily large transient in the motion of the output shaft, as will be shown later; moreover, setting the step detector in this manner at the conclusion of alignment is essential to avoid a possible alignment error.

When the input angle I i(t) and the error count C,(t) are set by a C20) pulse selected by the alignment system and transmitted by the signals Yi(t) and Yb(t), respectively, a 0tol transition of Ei(t) may occur or may have just occurred. Such a transition of E1(t) would excite the step-detector in the phase comparator and cause Ian undesired C1(t) up-count pulse to be transmitted by the signal Xi(t) to the reversible step counter immediately after it had been properly set, resulting in an incorrect error count Ce(t) and a phase-error amplitude |EI exceeding 1r electrical radians. To eliminate this possibility, Yb(t) is applied to the override-set inputs of hip-hops F11 and F12 in the step detector of the phase comparator (Ref: to FIG. 9). Therefore, at the time Yb(t) goes false, the conditions Ei=F11=F12=1 will always exist. Consequently, the reversible step counter in the phase comparator will not count up again until shortly after the next O-to-l transition of Ei(t) occurs. No similar precaution is necessary for inhibiting a possible down-count by the reversible step counter of the phase comparator.

The output shaft 23 will now start moving toward the existing null to correct the initial phase error, which will be of no greater amplitude than 1r electrical radians. A small amount of initial motion of 00 away from the reference position may occur. Regardless of the direction of initial motion, the output shaft will rotate toward the reference position as a result of the following operation.

6) If counterclockwise motion of the output shaft from the present position to the reference position is indicated by the counterclockwise-motion-direction signal condition Yd=1, send pulses derived from the initializer input Yj to the counterclockwise-incremental-motion signal input Yf of the phase-modulating generator 3. Alternately, if the clockwise-motion-direction signal Y =l, send 4pulses derived from Yj to the input Yg of the phase-modulating generator. The transducer alignment channel 2 is so constructed that YdYe=0 A dead zone wherein Yd=Ye=0 exists for o which includes the reference position toward which alignment is directed. If in the dead zone at the beginning of operation 6, proceed to operation 8. If the output ,shaft is not in the dead zone, it will now move in the direction of this zone.

(7) Upon arriving in the dead zone, discontinue sending pulses to the phase-modulating generator 3 and proceed to operation 8. The transducer alignment channel 2 is constructed with a dead-zone width such that the phaseerror amplitude [pel will now be appreciably less than 1r electrical radians.

The purpose of the remaining operati-ons is to compensate for the possibility that a torque disturbance has caused the absolute phase error lqbel to exceed 1r electrical radians when the output shaft arrives in the dead zone. These operations are similar to operations l through 4.

(8) Await the condition that the reference-carrierangle-G signal Ya.=1. ln general, Ys., will go true Iat the next false-true jump of Er and will remain true for one clock period. During this time,

Where all symbols are as previously defined.

(9) Although not strictly necessary, the error-overload flip-flop F24 may be reset to 1 again at this time While Ys,=1. So doing permits simpler programming of the initializer by permitting operations 8 through 11 to exactly duplicate operations 1 through 4.

(l0) Set the reversible step counter 20 in the phase comparator to 0 0 with aYb=1. pulse while Yq.,=1. (Here and elsewhere, notations such as 0 0 are used to indicate that a series of digits of unspecified length has been omitted. All omitted digits are assumed identical to the digit immediately preceding and to that succeeding the ellipsis.) The phase-error amplitude lofi is thereby set to less than 1r electrical radians.

(11) Set the electrica angle 11,(t) to 0 while Y.p,=l. This operation is accomplished with a Y1=1 pulse from the initializer 1 to the variable-phase generator in the phase-modulating generator 3 which is generating Ei(t) as its output. The operation puts E,.(t) in phase with E,.(t)

(12) Set the step detector in the phase comparator while Yb=1 to inhibit a possible extraneous up-count pulse to the reversible step counter. Such an extraneous pulse would increase the phase error by 2aelectrical radians and result in an alignment error by 2,1r/n mechanical radians. Without this precaution, such an alignment error would occur whenever the output shaft rotates counterclockwise during alignment.

In the absence of, or upon removal of, any disturbance torque, 9o will now come to rest in a steady-state position within i1r/(m1n') electrical radians of the reference position from which all future motion will be measured, where the symbols are as previously deiined. It is significant that no contribution to this alignment error is made by the alignment system, either through any existent inaccuracy in the transducer alignment channel or other means. Additional alignment error due to the control system itself can be adjusted to a negligible value; in practice, the stability of such adjustment has been found to be high.

Detailed Operation of the initializer and transducer-alignmentchannel sections of the alignment system, as shown in FIG. 1a, will now be discussed in detail. Except where otherwise stated, all nip-flops employed are of the clocked RS type with override set Iand lreset inputs which, when true, control the state of the ip-op regardless of the state of the clock or setor reset-enabling inputs. (Phister, Montgomery. Logical Design of Digital Computers. New York: John Wiley & Sons, Inc., 1958, pp. 11S-117, 121 ff.) Symbols associated with the inputs and outputs of a typical iiip-ilop are shown with F201n FIG. 4. These symbols are defined as follows:

PFa-:override-set input of flip-flop F2,

1F11: set-enable input of ilip-op Fa,

TFa==clock or trigger input of Hip-flop Fa, Fa=resetenable input fo iiip-flop Fa,

QFa: override-reset input of flip-flop Fa, Fa=norma1 or true output of flip-flop Fa,

Fa=false, complement, or bar output of flip-flop Fa.

Two significant equations governing inputs to the flip-iiop are TEA-NSDUCE'R LDIGN'MENT CHANNEL The logic diagram of the transducer alignment channel 2 is shown in FIG. 2. The main purpose of the transducer alignment channel is to indicate to the initializer 1 the direction in which the output shaft 23 should move to reach the reference position.

The only input to the transducer alignment channel is 00=the output shaft angle in radians.

Outputs of the transducer alignment channel .are

Yd=a logic signal commanding oounterclockwise motion to approach the reference position during alignment,

Ye=a logic signal commanding clockwise motion to approach the reference position during alignment.

As shown in FIG. 2, an opaque disk 50 is mounted on the output shaft Z3 perpendicular to the shaft axis. This disk has a transparent section '51, #+04 radians wide, where 04 0. Two photoconductive cells, P101 and P102, are mounted near the surface of the transducer disk at approximately equal radii from the disk center. These photocells are so mounted `as to be sensitive to a beam of light (the source of which is not shown) passing through the transparent sector of the disk parallel to the output shaft. Measured from the center of the disk, the angle between the photocells is 01; it is convenient to arrange the transducer align-ment channel so that It will be assumed that this condition is met in the discussion which follows.

Photocells P101 and P102 are connected through resistors R101 and R202, respectively, to the positive voltage source Es, as shown in FIG. 2. The output voltages from P101 and P102 are designated e101 and e102, respectively. As shown in FIG. 3, e101 will decrease with increasing illumination of P101 due to the resultant increase of the conductance of this photocell; e102 responds similarly to variation of the illumination of P102.

The function of P101 in association with the other elements shown in FIG. 2 is both to vary the outputs Yd and Y,j in such a manner as to command the proper direction of output-shaft rotation toward the reference position during alignment and to establish a dead zone of suitable width about the reference position inwhich Yd=Ye=O. The photocell P102 in association with the other elements in FIG. 2 assures that no other dead zone occurs at any other position of the output shaft.

The Voltage e101 is the input to triggers T101 and T102 in FIG. 2, set to iire at voltages E2 and Eb, respectively. Similarly, e102 is the input to trigger T103, which is set to fire at Ec. As shown in FIG. 3, these firing voltages are so adjusted that @102(91)=Ec=e102 (1f) v The transducer alignment channel must be designed so that the following relationships exist between the shaft angles cited:

0 3 1l'/ll As previously defined, n is a positive integer denoting the ratio of phase shift in E0 to variation of 0o. FIG. 2 also illustrates the manner in which the trigger outputs are connected to gates G101 and G102.

The following logic equations govern operation of the transducer alignment channel:

1, elmEb, Le.

Output `and gate equations:

ALIGNMENT-SYSTEM INITIALIZER SECTION The logic diagram of the initializer 1 appears in FIG. 4. The purpose of the initializer is to generate, upon receipt of a logical command to align from the computer or other external source, the logical signals necessary to align the incremental digital control system to the predetermined reference position from which all succeeding motion is to be measured. In general, the sequence in which such alignment signals are sent to the control system is determined by the design of the initializer, While the timing with which alignment signals are emitted is determined by logical signals sent to the initializer by the transducer alignment channel and the control system to l indicate the values of the significant state variables of the control system.

The following signals are inputs to the initializer:

In addition, the two-phase clock generator 24 supplies the primary and secondary clock trains C1 and C2, respectively, to both the initializer and the control system. These clock signals are shown in FIG. 5.

The following outputs are sent to the control system by the initializer:

Yb--error-set signal,

Yc=driveenable signal,

Yf=counterclockfwise incremental-command pulse train, Yg=clockwise inc-rementalcommand pulse train, Y=comrnand-phaseset signal.

As shown by FIG. 4, the initializer consists of lfour flip-flops, along with associated 4gates and logical inverters. When the initializer is dormant, all flip-Hops are in the false state; this condition is assured 'when power is first applied to the alginment system bythe preset signal P applied to F201, -Which is momentarily true 'when power is first applied and thereafter remains false. This signal may be supplied by the associated digital computer or some other external source. The alignment procedure starts when the normally false input Wa goes true for any period of duration exceeding T+r0, Where T is the clock period and T0 is the clock-pulse length. This W0 signal enables flip-flop input lFZOl, causing F201 to go true on the next C1 pulse. As align-ment proceeds, F202, F203, and F20.,t go true in succession, until all of the initializer ilip-ilops are simultaneously true. The next C1 pulse after F204 goes true or W0 goes false, 'whichever occurs last, causes all Hip-flops to return to the lfalse state. The initializer then remains in this dormant state until another aligncommand pulse is received at W0.

Successive steps in the alignment procedure are initiated by individual gates, each of which is enabled only when the rst of an adjacent pair of flip-flops is true and the other is false, proceeding from left to fright in FIG. 4. Thus the condition F201F202=1 is necessary to enable G200 and G207, and the condition F203F204=1 is necessary to enable G209. In FIG. 4, each flip-flop is labelled to indicate the step in the `alignment procedure which is performed when that flip-flop is in the true state and the succeeding flip-flop is false. Thus F201 sets the controlsystem elements for the first time, F202 slews the controlsystem output shaft to the dead zone, F203 sets the controlsystem elements for the second time to eliminate the effects of disturbance torque, and F204 resets the initializer to the dormant state.

A periodic train of pulses is continuously applied at YJ from the reference-carrier generator or an external source; during alignment, these pulses are emitted at Yf or Y,o1 to the appropriate incremental-command input of the control system to cause slewing (turning) toward the reference position of the output shaft. The direction of incremental motion commanded by the initializer is determined by gates G200 and G207 in response to Y0 and Ye. When the output shaft of the control system enters the dead zone and Y -Y0.=0, A202=1, thereby permitting F203 to go true on the next C1 pulse.

if a torque disturbance should cause the reversible step counter 2t) in the phase comparator of the control system l 6 to overload at any time during alignment, the signal W0=1 is applied to G200 of the initializer. As soon as F202=1, the next C2 pulse generates an override set signal thereby terminating alignment. Since W0 is also directed to the computer to indicate when a noncorrectable error due to torque overload occurs, the computer can be programmed to emit W,l pulses repeatedly when necessary until alignment is successfully completed.

The purpose of the preceding discussion was to cover the salient features of the initializer. Further discussion of its actual operation Will be included in the following section, which relates to operation of the initializer, the transducer `alignment channel, and the control system together during alignment.

The following logic equations govern operation of the initializer:

Logic-inverter equations:

A201: W o

Flip-flop F201 input equations:

PF20i=O TF2D1=C1 0F201=G201 QF201=W1D Flip-Hop F202 input equations:

1F202=F201 TF202=G200 m2025201 Flip-Hop F200 input equations:

1F203 S204 TF203=C1 QF203 :F221 Flip-flop F20ix input equations:

PF204= 6200 1F204=F203 TF204= G2,g

QF204 :F201

Gate equations I G201=A201F204 G202:C2F2o12o2 Y@ r Gzos Yd-i- Ye G204=A zozFzoz Gans: C2F2oz Wo l '7 These equations are implemented in the logic diagram shown in FG. 4.

The logic diagram of the two-phase clock 24, the twophase reference carrier generator 17 and the referenceangle gate 14 appear in FIG. 6.

Clock 24 and generator 17 are described in detail in applicants co-pending application Serial No. 394,977, filed September 8, 1964, entitled Digital Reference Source.

The reference-angle gate 14 is electrically connected to the carrier generator 17 as schematically shown in FIG. 6.

The function of the reference-angle gate is to provide a single logical output, the normally false enabling signal Yslt), to indicate when the quantized instantaneous value of the total angle of the input-command carrier E(l) is between predetermined limits. The signal Y4.,.(t) goes true once during each cycle of 13,(2).

The inputs to the reference-angle gate include the normal and complement outputs of each hip-flop in the reference-carrier generator 17. From each such flip-flop either the normal or complement output is directed to the AND- gate G301 by the corresponding switches S301 to S307.

The reference-angle gate emits an enabling signal Yerzl when, and only when,

K pm1err+1 where K represents the specific value of the number Cr to which the reference-angle gate has been set (Ref: to relation 18 in the referenced application Serial No. 394,977 for the derivation of Cr), m1 has been previously defined, and p is a' non-negative Ainteger chosen to satisfy relation 57.

The output of the gate GB01 has been referred to as an enabling signal because its value is signilicant only after suiicient time has elapsed after a C1 pulse terminates to permit all flip-flops in the reference-carrier generator to settle. The output of Gam is read by using it as one input of an AND-gate, the other input of which is either C1 Or C2.

The number K is set by switches S301 through S307 in accordance with the relationship More than one reference-angle gate may be attached to the reference-carrier generator in parallel. Each such gate may be set to a different val-ue of K.

The logic diagram of the overload detector 4 and the reversible step counter 2! appear in FIG. 7. The reversible step counter is described in detail in applicants co-pending application Ser. No. 379,997, filed July 2, 1964, now U.S. Patent No. 3,329,895, entitled Digital Phase Comparator Capable of Indicating Greater Than 360 Degree Phase Differences.

The overload detector 4 is electrically connected to the step counter 20 as schematically shown in FIG. 7.

The purpose of the overload detector 4 is to provide an overload Signal if the magnitude of the phase angle qf rises sufciently to overload the reversible step counter 20.

The AND-gate G20 receives as inputs the signal X1 and the normal outputs of each of the counter flip-hops. The AND-gate G29 receives as inputs the signal XD and the complement outputs of each of the counter flip-Hops.

When the counter 20 is overloaded a pulse will be sent from either G20 or G20, depending upon the overload state 4of the counter, to the OR-gate 30 supplies a trigger pulse to the error overload Hip-flop F24. Flip-flop F24 will be set when the counter is overloaded. This flip- 18 ilop can be reset only by the alignment system which supplies the reset signal Yc.

The normal output of F24 is W0, a signal which is directed to the computer (not shown) and to the alignment system. The complement output is Wo a signal which is directed to the loop-inhibit switch 5. The servo-loop is enabled only when W0=0.

The logic diagram of the variable-phase generator appears in FIG. 8 This phase generator is described in detail in applicants co-pending application Ser. No. 368,090 referenced previously. The purpose of illustrating the phase generator is to show where the signal Yi is applied to the flip-ops F0, F1 Fp 1. The signal Yi is substituted for the signal P normally applied there.

Referring to FIG. `9, there is shown the logic diagram of the step detector 10. Detector 10 is described in detail in applicants co-pending application Ser. No. 379,997 referenced previously. The purpose of illustrating the step detector is to show where the signal Yb is applied to flip-flops F11 and F12.

COMBINED OPERATION OF ALIGNMENT-SYSTEM COMPONENTS Operation of the initializer, the transducer alignment channel, and an incremental digital control system together during alignment will now be discussed in detail. Relevant waveforms are shown in FIG. 5. It will be assumed that the control-system output shaft 23 is initially positioned in such a manner that making counterclockwise rotation of the output shaft during alignment necessary. `It will also be assumed that the reversible step counter 20 of the control system has not been yoverloaded and will not be overloaded during the alignment procedure, because detection and correction of an overload by the alignment system has already been discussed. Thus, before and during alignment, it will be assumed that The alignment procedure will be discussed with specic reference to FIG. 5, which shows waveforms relatingto the alignment system. Indenite lapses of time of arbitrary duration are indicated by jagged discontinuities in the waveforms of this figure. Clock trains C1 and C2 are supplied by the two-phase clock generator 24 which is used in common with the associated incremental phasecomparison control system. With certain exceptions, C1 pulses are employed to trigger flip-flops, while C2 pulses are used to interrogate gates enabled by dip-flops after they have settled and to apply override-set inputs to flipflops triggered by C1 without interfering with their normal action.

Alignment will be discussed below in steps corresponding to the titles assigned to the flip-flops in FIG. 4.

(l) System set A.-Alignment is initiated when the asynchronous alignment command Wo from the computer goes true at a in FIG. 5, thereby enabling input 1F201 with a true signal. The C1 pulse at b then causes F201 to go true at c. Although the W0 pulse shown goes false i at d and is only slightly longer than T-l-rc, a longer pulse would have been equally satisfactory.

No further action is possible until, in approximate synchronization with the C1 pulse at e, the referencecarrier-angle-O signal Ygl, goes true at f. The signal Ygl. remains true for one clock period, during which where r(t) is the reference-carrier angle and m1 and p are defined as before. The gate Gm is now interrogated by the C2 pulse at g, leading to an output pulse h at G200 which causes F200 to be set at z', sets the phase comparator 5 of the control system with a Yb pulse, and sets the phase-modulating generator 3 of the control system so that, until the next C1 pulse at k,

where the symbols are as previously defined. Had the control loop been open, it would be closed at this time by a Y.c pulse. The input carrier El has now been placed in phase with the reference carrier Er. In addition, G20@ has been enabled, permitting a counterclockwise incremental command signal Yf to be transmitted to the control system at j. Finally, in response to the C1 pulse at k, YQ, goes false at I.

(2) Sew.-With F202F203Yd=1, incremental command signals continue to be sent -from the initializer to the control system. Counterclockwise motion of the output shaft 23 continues until Yd goes false asynchronously at m, indicating that the output shaft has entered the dead Zone. Incremental-command pulses to the control system stop immediately at n. The above action enables dip-flop input 1F203, permitting the C1 pulse at o` to cause F203 to go true at p.

(3) System set B.-No further action occurs until, in approximate synchronization with the C1 pulse at q, Yi, again goes true at r, indicating that the conditions of Relation 56 have again been met. As before Y.,. remains true for one clock period until the C1 pulse at v occurs. Since now F202F204YY=L the C2 pulse at s appears at the output of G209 at t to set F204 at u and to set the phase comparator of the control system with a Y0, pulse. The control system is now aligned. Finally, in ap proximate synchronization with the C1 pulse at v, Y2., goes false at u.

(4) Inz'tz'alz'zer reset.-At this time, the only operation which remains is to reset the initializer to the dormant condition with all Hip-flops in the false state. Because F204=A201=1, in response to the C1 pulse at v, F202 is reset to the false state at A. An override reset resul-ts from making QF202=QF200=QF204=L In response to these signals, F202, F202, and F204 return to false states at z, y, and x. The initializer is now again in the dormant state.

If the initial position of the output shaft had required clockwise rotation during alignment, the initial states of signals from the transducer alignment channel would have been d==Ye=L The alignment system would have functioned as described, except for emitting incremental motion pulses at Yg instead of Yf. lf the output shaft had initially been in the dead zone, the same alignment procedure would have been followed, but no incrementalcommand pulses would have been emitted at Yf or Yg.

The location of the alignment position can be varied over a limited range within the dead zone by varying the range of the reference carrier angle over which Yg, in FIG. 5 remains true. The range, previously expressed by Relation 56 over which Y0., is true now becomes where q is a positive integer determined to the base 2 by selection of the output of each different flip-Hop of the reference-carrier generator to which the reference-angle gate is connected. In this manner the alignment position can be moved electrically by vary small increments equal to the resolution of the associated incremental digital control system.

Here the non-negative integer p is a function of time bounded by the conditions Although the invention has been described and illustrated in detail, it is to be clearly understood that the same is by way of illustration and example only and is not to be Itaken by way of limitation, the spirit and scope of this invention being limited only by the terms of the appended claims.

2i) I claim:

1. An alignment system for accurately aligning the shaft of an incremental digital control servo to a predetermined reference position comprising in combination:

an incremental digital control servo for positioning said shaft in accordance with a net number of input control pulses, said servo including an output ytransducer having a plurality of null positions;

an alignment transducer for determining the preferred direction of rotation of said shaft to a predetermined reference position, said alignment transducer having a single null position corresponding to said reference position and providing a first direction signal when said rotation is in one direction from said reference position and for supplying a second direction signal when said rotation is in an opposite direction from said reference position;

an initializer for receiving an alignment-command signal and said iirst and second signals and for providing a net number of input control pulses proportional to said input signals to said control servo upon receipt of said alignment-command signal so as to cause said shaft to rotate towards said reference position.

. 2. The combination recited in claim 1 wherein said alignment transducer comprises:

a disk having an opaque sector and a transparent sector, said disk mounted to said shaft such that the shaft axis is perpendicular to said disk;

lirst and second stationary photocells mounted at approximately equal radii from the center of said disk and approximately parallel to the surface of said disk, said photocells spaced apart from each other a distance substantially less than the width of said transparent sector;

a stationary source of light rays aligned with said photocells on the opposite side of said disk so as to pass light rays through said disk onto said photocells when said transparent sector is aligned with said photocells;

means for detecting the output of said photocells and providing said first direction signal when said transparent sector is opposite both of said photocells and providing said second direction signal when said opaque sector is opposite both of said photocells, said means adapted to not provide said direction signals when said second photocell is opposite said transparent sector and said rst photocell is opposite both said opaque sector and said transparent sector.

3. The combination recited in claim 2 wherein said detecting means comprises:

a first level detector connected to said first photocell for providing a iirst level signal when said first photocell is opposite said transparent sector;

a second level detector connected to said first photocell for providing a second level signal when said second photocell is opposite said opaque sector;

a third level detector connected to said second photocell for providing a third level signal when said second photocell is opposite both said transparent and opaque sectors;

first gate means for receiving said first and third level signals and providing said iirst direction signal in the absence of both said rst and third level signals;

second gate means for receiving said second and third level signals and providing said second direction signal upon receipt of either said second or said third level signals.

4. An alignment system for accurately aligning the shaft of an incremental digital control servo to a predetermined reference position comprising in combination:

an incremental digital control servo for positioning said shaft in accordance with a net number of input control pulses;

an alignment transducer for determining the preferred direction of angular rotation of said shaft to a pre- 2l determined reference position and for supplying a first direction signal when said rotation is in one direction from said reference position and for supplying a second direction signal when said rotation is in an opposite direction from said reference position;

an initializer for receiving an alignment-command signal and said first and second direction signals and for providing a net number of input control pulses proportional to said direction signals to said control servo upon receipt of said alignment-command signal so as to cause said shaft to rotate towards said reference position.

5. The combination recited in claim 4 wherein said alignment transducer comprises:

a disk having an opaque sector and a transparent sector, said disk mounted to said shaft such that the shaft axis is perpendicular to said disk;

first and second stationary photocells mounted at approximately equal radii from the center of said disk and approximately parallel to the surface of said disk, said photocells spaced apart from each other a distance substantially less than the width of said transparent sector; t

a stationary source of light rays aligned with said photocells on the opposite side of said disk so as to pass light rays through said disk onto said photocells when said transparent sector is aligned with said photocells;

means for detecting the output of said photocells and 6. The combination recited in claim 5 wherein said detecting means comprises:

a first level detector connected to said first photocell for providing a first level signal when said first photocell is opposite said transparent sector;

second level detector connected to said first photocell for providing a second level signal when said second photocell is opposite said opaque sector;

a third level detector connected to said second photocell for providing a third level signal when said second photocell is opposite both said transparent and opaque sectors;

irst gate means for receiving said first and third level signals and providing said first direction signal in the absence of both said first and third level signals;

second gate means for receiving said second and third level signals and providing said second direction signal upon receipt of either said second or said third level signals.

7. An alignment system comprising in combination: first means for servoing a mechanical displacement to a null position, said means comprising a phase generator for receiving input control pulses and providing a first periodically varying signal the phase angle of which varies as a function of the net number of input control pulses, a phase comparator for producing an error signal representative of the phase difference between said first signal Vand a second periodically varying signal which varies as a function of said mechanical displacement from said null position, a compensated driver -for receiving said error signal and providing an amplified and compensated signal proportional to said error signal, an electromechanical means for converting said compensated signal into said mechanical displacement; second means for determining the preferred direction of mechanical displacement to a predetermined reference position and for providing signals indicative of said preferred direction; third means for receiving an alignment-command signal and said direction signals and providing fa net number of input control pulses proportional to said direction signals to said phase generator upon receipt of said alignment command signal till said mechanical displacement is substantially aligned to said reference position.

8. The combination recited in claim 7 wherein is included means for disabling said first means when the magnitude of said error signal rises above a predetermined level.

9. The combination recited in claim 7 wherein said second means comprises:

'a `disk having an opaque sector and a transparent sec- 4 tor, said disk connected to rotate with said mechanical displacement;

first and second stationary photocells mounted at approximately equal radii from the center of said disk and approximately parallel to the surface of said disk, said photocells spaced apart from each other a distance substantially less than the width of said transparent sector;

a Stationary source of light rays laligned with said photocells on the opposite side of said disk so as to pass light rays through said disk onto said photocells when said transparent sector is aligned with said photocells;

means for detecting the output of said photocells and providing a first signal indicative of a first preferred direction when said transparent section is opposite both of said photocells and providing a second signal indicative of a second preferred direction when said opaque sector is opposite both of said photocells, said means not providing signals when one of said photocells is opposite said transparent sector and the other of said photocells is opposite both said opaque sector and said transparent sector.

References Cited UNITED STATES PATENTS 2,866,506 12/1958 Hierath et al.

3,209,222 9/ 1965 Holy S18-19 XR 3,239,735 3/1966 Raider et al 318-28 XR 3,324,364 6/1967 Caruthers 318-18 3,340,447 9/1967 MacDonald 318-18 BENJAMIN DOBECK, Primary Examiner. 

